Bittware IA-860m |Massive Memory Bandwidth |PCIe 5.0 + CXL |Intel M-Series Agilex |HBM2e + DDR4 |400G networking
The Bittware IA-860m is built on BittWare’s enterprise-class foundation stones: existing products and processes that are already proven through extensive validation. When it’s time to ramp to production, this means a faster turnaround and utilizing the same hardware you have been using for development.
The Intel Agilex M-Series FPGAs are optimized for applications that are throughput- and memory-intensive. 1TBps Memory Bandwidth: A hardened memory NoC supports the industry’s highest memory bandwidth at over 1 TBps using HBM2e and DDR4. 400G: Configurable networking support for the most demanding bandwidth requirements. PCIe Gen5 and CXL Support: Data transfer speeds 2x faster than Gen4, and high-speed interface between CPUs and workload accelerators.
Built with the latest PCIe Gen5 interface, the IA-860m can transfer up to twice the bandwidth of Gen4 devices. This Massive Memory Bandwidth accelerator card includes Intel’s oneAPI Software Tool Flow Frame for FPGAs.
Third Party IP-Cores:
- PROVA-C 100G Network Infrastructure Testing Application and Appliance
- nxFramework FPGA Development Framework from Enyx
- Arkville DPDK IP Core from Atomic Rules
FEATURES:
- Intel Agilex 7 AGM039 (default)
- Package: R47A
- 16GB HBM2e
- Core speed grade -2; XCVR speed grade -2
- FPGA includes ARM HPS
- Other Agilex FPGA options are available, including
- CXL with XCVR speed grade -1 (CXL IP is licensed and purchased separately)
- 32GB HBM2e
- ARM HPS
- Dedicated 40-bit DDR4
- Dedicated Flash memory for booting ARM
- Optional 1GbE interface (contact BittWare)
- On-Board flash
- 2Gbit Flash memory for booting FPGA
- External memory:
- 2x 288-pin DDR4 DIMM slots, each supporting 16GB (default) DDR4 SDRAM modules (32GB total)
- Host interface:
- x16 Gen5 interface direct to FPGA, connected to PCIe hard IP
- CXL v1.1 (CXL IP is licensed and purchased separately)
- QSFP-DD cage:
- 3x QSFP-DD cages on front panel connected directly to FPGA via 24 transceivers
- User programmable low jitter clocking supporting 10/25/40/100/400GbE
- Each QSFP-DD can be independently clocked
- Jitter cleaner for network recovered clocking
- Multi-rate hard MAC+FEC
- Fully backward compatible with QSFP28s
- MCIO:
- Two x8 connectors each supporting 2x Gen4 x4 root complexes (4x Gen4 x4 total)
- External clocking
- 1 PPS and 10MHz ref clk front panel inputs (optional)
- USB:
- USB access to BMC, USB-JTAG, USB-UART
- Board Management Controller
- Power sequencing and reset
- Voltage, current, temperature monitoring
- Clock configuration
- Low bandwidth BMC-FPGA comms with SPI link
- USB 2.0
- PLDM support
- Card-level security
- BMC Root of Trust
- BMC and FPGA secure boot
- BMC and FPGA secure upgrade
- Key management
- RTC with battery backup
- Cooling:
- Standard: dual-width passive heatsink
- Optional: dual-width liquid cooling
- Electrical:
- On-board power derived from PCIe slot 12V and two 8-pin AUX power connectors
- Power dissipation is application dependent
- Typical max power consumption TBD
- Environmental:
- Operating temperature: 5°C to 35°C
- Quality:
- Manufactured to IPC-A-610 Class 2
- RoHS compliant
- CE, FCC & ICES approvals
- Form factor:
- Standard-height, 3/4-length, dual-slot PCIe card
- 111.15mm x 266.70mm (4.376in x 10.500in)
Development Tools:
- System development
- BittWare SDK including PCIe driver, libraries, and board monitoring utilities
- Application development:
- Supported design flows - Intel High-Level Synthesis (C/C++) & Quartus Prime Pro (HDL, Verilog, VHDL, etc.)
Product Data