Kaya Instruments offers ready-to-use CXP IP Cores for host-side and device-side FPGAs.
The host-side CXP IP assumes a PCIe card and either a Windows PC or Linux, but can also be implemented in any format on a supported FPGA, as this is a standard Kaya CXP frame grabber IP Core.
Both frame grabber CXP IP and camera-side CXP IP are available as either an encrypted NetList or as open source. You cannot change the encrypted NetList Kaya CXP IP, whereas you can adapt, amend, extend, and otherwise reprogram the Kaya CXP open source IP, and user-defined algorithms can be embedded.
CoaXPress Versions 1 and 2 are available, so you can implement CXP-6 Gbps and CXP-12 Gbps IP Cores.
Gidel provides the “ProcDev” Proc Developer’s Kit for fast and accurate FPGA programming, from which is derived the “ProcVision” FPGA development kit for frame grabber IP Core tailoring and algorithm embodiment.
This Kit also includes debugging templates, imaging libraries, GenICam support, a camera simulator, and a signal tracing utility to form a comprehensive developer’s kit suite of FPGA vision development tools.
Kaya CoaXPress Intellectual Property FPGA cores for host and device side cameras and frame grabbers, compatible with Xilinx and Intel FPGAs, CoaXPress standard rev 2.0 / 1.1 / 1.0 with up to 12.5 Gbps high speed link and up to 41.6 Mbps low speed link
More…Gidel Real-time JPEG compression of high performance sensor image streams, IP for FPGA based frame grabbers, compression performance beyond 1 Giga components/s, color subsampling can be encoded in 4:2:2, 4:4:4 or 4:2:0 formats, ultra-compact IP
More…